Intel
®
Pentium
®
M Processor on
90 nm Process with 2-MB L2
Cache
Datasheet
January 2006
Document Number: 302189-008
IINFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL
®
PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY
ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN
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Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The Intel
®
Pentium
®
M processor on 90 nm process with 2-MB L2 cache may contain design defects or errors known as errata which may cause the
product to deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
.
processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across
different processor families. See www.intel.com/products/processor_number for details.
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Copyright © 2004—2006, Intel Corporation. All rights reserved
Δ
Intel
2
Datasheet
Contents
1
Introduction....................................................................................................................................
7
1.1
1.2
2
2.1
Terminology .......................................................................................................................... 9
References ........................................................................................................................... 9
Clock Control and Low Power States ................................................................................. 11
2.1.1 Normal State .......................................................................................................... 11
2.1.2 AutoHALT Power-Down State ............................................................................... 11
2.1.3 Stop-Grant State .................................................................................................... 12
2.1.4 HALT/Grant Snoop State ....................................................................................... 12
2.1.5 Sleep State ............................................................................................................ 13
2.1.6 Deep Sleep State................................................................................................... 13
2.1.7 Deeper Sleep State ............................................................................................... 14
Enhanced Intel SpeedStep
®
Technology ........................................................................... 14
Front Side Bus Low Power Enhancements ........................................................................ 15
Processor Power Status Indicator (PSI#) Signal ................................................................ 15
Power and Ground Pins...................................................................................................... 17
3.1.1 FSB Clock (BCLK[1:0]) and Processor Clocking ................................................... 17
Voltage Identification .......................................................................................................... 17
Catastrophic Thermal Protection ........................................................................................ 18
Signal Terminations and Unused Pins................................................................................ 19
FSB Frequency Select Signals (BSEL[1:0]) ....................................................................... 19
FSB Signal Groups ............................................................................................................. 19
CMOS Signals .................................................................................................................... 20
Maximum Ratings ............................................................................................................... 21
Processor DC Specifications ..............................................................................................21
Processor Pinout and Pin List............................................................................................. 54
Alphabetical Signals Reference .......................................................................................... 70
Thermal Specifications ....................................................................................................... 80
5.1.1 Thermal Diode ....................................................................................................... 80
5.1.2 Thermal Diode Offset............................................................................................. 81
5.1.3 Intel
®
Thermal Monitor........................................................................................... 82
Low Power Features....................................................................................................................
11
2.2
2.3
2.4
3
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4
4.1
4.2
5
5.1
Electrical Specifications
............................................................................................................. 17
Package Mechanical Specifications and Pin Information
....................................................... 47
Thermal Specifications and Design Considerations................................................................
77
Datasheet
3
Figures
2-1 Clock Control States................................................................................................................... 11
3-1 Illustration of Active State VCC Static and Ripple Tolerances (HFM- VID#A)............................ 31
3-2 Illustration of Deep Sleep State VCC Static and Ripple Tolerances (LFM- VID#A) ................... 32
3-3 Illustration of Active State VCC Static and Ripple Tolerances (HFM- VID#B)............................ 33
3-4 Illustration of Deep Sleep State VCC Static and Ripple Tolerances (LFM- VID#B) ................... 34
3-5 Illustration of Active State VCC Static and Ripple Tolerances (HFM- VID#C) ........................... 35
3-6 Illustration of Deep Sleep State VCC Static and Ripple Tolerances (LFM- VID#C) ................... 36
3-7 Illustration of Active State VCC Static and Ripple Tolerances (HFM- VID#D) ........................... 37
3-8 Illustration of Deep Sleep State VCC Static and Ripple Tolerances (LFM- VID#D) ................... 38
3-9 Illustration of Active State VCC Static and Ripple Tolerances (HFM- VID#E)............................ 39
3-10 Illustration of Deep Sleep State VCC Static and Ripple Tolerances (LFM- VID#E) ................... 40
3-11 Active VCC and ICC Load Line .................................................................................................. 43
3-12 Deep Sleep VCC and ICC Load Line ......................................................................................... 44
4-1 Micro-FCPGA Package Top and Bottom Isometric Views ......................................................... 47
4-2 Micro-FCPGA Package - Top and Side Views ........................................................................... 48
4-3 Micro-FCPGA Package - Bottom View ....................................................................................... 49
4-4 Micro-FCBGA Package Top and Bottom Isometric Views ......................................................... 51
4-5 Micro-FCBGA Package Top and Side Views ............................................................................. 52
4-6 Micro-FCBGA Package Bottom View ......................................................................................... 54
4-7 The Coordinates of the Processor Pins as Viewed from the Top of the Package ...................... 55
4
Datasheet
Tables
1-1 References ................................................................................................................................... 9
3-1 Voltage Identification Definition .................................................................................................. 18
3-2 FSB Pin Groups.......................................................................................................................... 20
3-3 Processor DC Absolute Maximum Ratings................................................................................. 21
3-4 Voltage and Current Specifications - Standard Voltage Processors .......................................... 22
3-5 Voltage and Current Specifications - Low Voltage Processors .................................................. 24
3-6 Voltage and Current Specifications - Ultra Low Voltage Processors.......................................... 26
3-7 Voltage and Current Specifications (Continued)......................................................................... 28
3-8 Voltage Tolerances for the Intel
®
Pentium
®
M Processor (Active State) VID#A ........................ 31
3-9 Voltage Tolerances for the Intel
®
Pentium
®
M Processor (Deep Sleep State) VID#A ............... 32
3-10 Voltage Tolerances for the Intel
®
Pentium
®
M Processor (Active State) VID#B ........................ 33
3-11 Voltage Tolerances for the Intel
®
Pentium
®
M Processor (Deep Sleep State) VID#B ............... 34
3-12 Voltage Tolerances for the Intel
®
Pentium
®
M Processor (Active State) VID#C ........................ 35
3-13 Voltage Tolerances for the Intel
®
Pentium
®
M Processor (Deep Sleep State) VID#C ............... 36
3-14 Voltage Tolerances for the Intel
®
Pentium
®
M Processor (Active State) VID#D ........................ 37
3-15 Voltage Tolerances for the Intel
®
Pentium
®
M Processor (Deep Sleep State) VID#D ............... 38
3-16 Voltage Tolerances for the Intel
®
Pentium
®
M Processor (Active State) VID#E ........................ 39
3-17 Voltage Tolerances for the Intel
®
Pentium
®
M Processor (Deep Sleep State) VID#E ............... 40
3-18 Voltage Tolerances for the Intel
®
Pentium
®
M Processor LV (Active State) .............................. 41
3-19 Voltage Tolerances for the Intel
®
Pentium
®
M Processor LV (Deep Sleep State) ..................... 42
3-20 Voltage Tolerances for the Intel
®
Pentium
®
M Processor ULV (Active State)............................ 42
3-21 Voltage Tolerances for the Intel
®
Pentium
®
M Processor ULV (Deep Sleep State)................... 43
3-22 FSB Differential BCLK Specifications ......................................................................................... 44
3-23 AGTL+ Signal Group DC Specifications ..................................................................................... 45
3-24 CMOS Signal Group DC Specifications...................................................................................... 45
3-25 Open Drain Signal Group DC Specifications .............................................................................. 46
4-1 Micro-FCPGA Package Dimensions........................................................................................... 50
4-2 Micro-FCBGA Package Dimensions........................................................................................... 53
4-3 Pin Listing by Pin Name.............................................................................................................. 57
4-4 Pin Listing by Pin Number .......................................................................................................... 63
4-5 Signal Description....................................................................................................................... 70
5-1 Power Specifications for the Intel
®
Pentium M Processor .......................................................... 78
5-2 Thermal Diode Interface ............................................................................................................. 81
5-3 Thermal Diode Specification....................................................................................................... 81
Datasheet
5